Abstract:Metal-ferroelectric-insulator-silicon (MFIS) capacitors with Bi_3.15Nd_0.85Ti₃O₁₂ (BNT) ferroelectric thin film were simulated using a commercial software Silvaco/Atlas, and the effects of applied voltage and insulator layer on capacitance−voltage (C−V) hysteresis loops and memory windows were investigated. For the MFIS capacitors with CeO₂ insulator, with the increase of applied voltage from 2 V to 15 V, the C−V loops become wider and memory windows increase from 0.15 V to 1.27 V. When the thickness of CeO₂ layer increases from 1 nm to 5 nm at the applied voltage of 5 V, the C−V loops become narrower and the memory windows decrease from 1.09 V to 0.36 V. For MFIS capacitors with different insulator layers (CeO₂, HfO₂, Y₂O₃, Si₃N₄ and SiO₂), the high dielectric constants can make the C−V loops wider and improve the capacitor’s memory window. The simulation results prove that Silvaco/Atlas is a powerful simulator for MFIS capacitor, and they are helpful to the fabrication of MFIS nonvolatile memory devices.

Key words: MFIS; BNT ferroelectric thin film; memory window; Silvaco/Atlas